Some More Questions:-
  1. In a VCO,the capacitance is varied by  using __________.
    ans: rev biased varactor diode
  2. A pnp trans. in active region has  _____________.
    ans:b-e junction fwd biased & b-c rev biased.
  3. in a nmos how is V-threshold affected by increasing doping conc. of substrate ?
  4. condition for sustained oscillations in a osc is___.
    ans:A=1 & phase shift = n*pi.
  5. if  A?B=C and C?A=B then what is the boolean operator ?
  6. clk is given with some period T to a logic gate.
    the same clk is again fed to the gate via a delay
    element with a delay of T/4 duration.if the gate
    acts as a freq.doubler then identify the gate.
  7. define the setup time & hold time in a f/f.
  8. given a D f/f ,construct a T f/f from it.
  9. given a 2:1 mux,how will u implement an AND & OR gate ?