Some More Questions:-
In a VCO,the capacitance is varied by using __________.
ans: rev biased varactor diode
A pnp trans. in active region has _____________.
ans:b-e junction fwd biased & b-c rev biased.
in a nmos how is V-threshold affected by increasing doping conc. of substrate ?
condition for sustained oscillations in a osc is___.
ans:A=1 & phase shift = n*pi.
if A?B=C and C?A=B then what is the boolean operator ?
clk is given with some period T to a logic gate.
the same clk is again fed to the gate via a delay
element with a delay of T/4 duration.if the gate
acts as a freq.doubler then identify the gate.
define the setup time & hold time in a f/f.
given a D f/f ,construct a T f/f from it.
given a 2:1 mux,how will u implement an AND & OR gate ?